/*****************************************************
This program was produced by the
CodeWizardAVR V1.24.6 Evaluation
Automatic Program Generator
© Copyright 1998-2005 Pavel Haiduc, HP InfoTech s.r.l.
e-mail:office@hpinfotech.com
Project :
Version :
Date : 17.05.2005
Author : Freeware, for evaluation and non-commercial use only
Company :
Comments:
Chip type : ATmega128
Program type : Application
Clock frequency : 16,000000 MHz
Memory model : Small
External SRAM size : 0
Data Stack size : 1024
*****************************************************/
#include <mega128.h>
#define RXB8 1
#define TXB8 0
#define UPE 2
#define OVR 3
#define FE 4
#define UDRE 5
#define RXC 7
#define FRAMING_ERROR (1<<FE)
#define PARITY_ERROR (1<<UPE)
#define DATA_OVERRUN (1<<OVR)
#define DATA_REGISTER_EMPTY (1<<UDRE)
#define RX_COMPLETE (1<<RXC)
// Get a character from the USART1 Receiver
#pragma used+
char getchar1(void)
{
char status,data;
while (1)
{
while (((status=UCSR1A) & RX_COMPLETE)==0);
data=UDR1;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
return data;
};
}
#pragma used-
// Write a character to the USART1 Transmitter
#pragma used+
void putchar1(char c)
{
while ((UCSR1A & DATA_REGISTER_EMPTY)==0);
UDR1=c;
}
#pragma used-
// Declare your global variables here
void main(void)
{
// Declare your local variables here
// Input/Output Ports initialization
// Port A initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTA=0x00;
DDRA=0x00;
// Port B initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTB=0x00;
DDRB=0x00;
// Port C initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTC=0x00;
DDRC=0x00;
// Port D initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTD=0x00;
DDRD=0x00;
// Port E initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTE=0x00;
DDRE=0x00;
// Port F initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTF=0x00;
DDRF=0x00;
// Port G initialization
// Func4=In Func3=In Func2=In Func1=In Func0=In
// State4=T State3=T State2=T State1=T State0=T
PORTG=0x00;
DDRG=0x00;
// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: Timer 0 Stopped
// Mode: Normal top=FFh
// OC0 output: Disconnected
ASSR=0x00;
TCCR0=0x00;
TCNT0=0x00;
OCR0=0x00;
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// OC1C output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;
OCR1CH=0x00;
OCR1CL=0x00;
// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2 output: Disconnected
TCCR2=0x00;
TCNT2=0x00;
OCR2=0x00;
// Timer/Counter 3 initialization
// Clock source: System Clock
// Clock value: Timer 3 Stopped
// Mode: Normal top=FFFFh
// Noise Canceler: Off
// Input Capture on Falling Edge
// OC3A output: Discon.
// OC3B output: Discon.
// OC3C output: Discon.
// Timer 3 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
// Compare C Match Interrupt: Off
TCCR3A=0x00;
TCCR3B=0x00;
TCNT3H=0x00;
TCNT3L=0x00;
ICR3H=0x00;
ICR3L=0x00;
OCR3AH=0x00;
OCR3AL=0x00;
OCR3BH=0x00;
OCR3BL=0x00;
OCR3CH=0x00;
OCR3CL=0x00;
// External Interrupt(s) initialization
// INT0: Off
// INT1: Off
// INT2: Off
// INT3: Off
// INT4: Off
// INT5: Off
// INT6: Off
// INT7: Off
EICRA=0x00;
EICRB=0x00;
EIMSK=0x00;
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=0x00;
ETIMSK=0x00;
// USART1 initialization
// Communication Parameters: 8 Data, 1 Stop, No Parity
// USART1 Receiver: On
// USART1 Transmitter: On
// USART1 Mode: Asynchronous
// USART1 Baud rate: 56000
UCSR1A=0x00;
UCSR1B=0x18;
UCSR1C=0x06;
UBRR1H=0x00;
UBRR1L=0x11;
// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
SFIOR=0x00;
while (1)
{
// Place your code here
};
}
Компилируется великолепно, но при попытке исполнения в протеусе - говорит такую лабуду:
SIMULATION LOG
==============
Design: C:\hobby\test128.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author: <NONE>
Created: 25/04/05
Modified: 17/05/05
Compiling source files...
Build completed OK.
Compiling netlist...
Linking netlist...
Partition analysis...
Simulating partition 1 [A7D34524]...
Animation started sucessfully...
PROSPICE Release 6.7 SP0 (C) Labcenter Electronics 1993-2005.
SPICE Kernel Version 3f5. (C) Berkeley University ERL.
Reading netlist...
Reading SPICE models...
Loading library 'ANALOGD.SML'
Loading library 'APEX.SML'
Loading library 'BURRBROWN.SML'
Loading library 'ELANTEC.SML'
Loading library 'FAIRCHLD.SML'
Loading library 'INTERSIL.SML'
Loading library 'LINTEC.SML'
Loading library 'NATOA.SML'
Loading library 'SUPERTEX.SML'
Loading library 'TECCOR.SML'
Loading library 'TEX101.SML'
Loading library 'TEX301.SML'
Loading library 'TEX3_1.SML'
Loading library 'TEX401.SML'
Loading library 'TEX5_1.SML'
Loading library 'VALVES.SML'
Loading library 'ZETEX.SML'
Building circuit...
Added GEARTH resistor for net #00008.
Added GEARTH resistor for net #00009.
Added GEARTH resistor for net #00010.
Added GEARTH resistor for net #00060.
Added GEARTH resistor for net #00061.
Added GEARTH resistor for net #00062.
Instantiating SPICE models...
[U1] AVR model release 6.7 SP0.
[U1] Loaded 4096 bytes of persistent EEPROM data.
[U1] Loading HEX file 'sourceC\7.hex'.
[U1] Read total of 426 bytes from file 'sourceC\7.hex'.
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
LOOP LIMIT: TIME = 0.00129125. CALLBACK = 00000001, STATE =???
DSIM ERROR: DSIM: race condition detected at time 0.00129125.
[DSIM] RUN Error.
Real Time Simulation FAILED.
он, что - не может симулировать УСАРТ1 ?