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// Chipcon
// Product = CC430Fx13x
// Chip version = C   (PG 0.7)
// Crystal accuracy = 10 ppm
// X-tal frequency = 26 MHz
// RF output power = 0 dBm
// RX filterbandwidth = 101.562500 kHz
// Deviation = 19 kHz
// Datarate = 38.383484 kBaud
// Modulation = (1) GFSK
// Manchester enable = (0) Manchester disabled
// RF Frequency = 867.999939 MHz
// Channel spacing = 199.951172 kHz
// Channel number = 0
// Optimization = -
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction =
// Length configuration = (0) Fixed packet length, packet length configured by PKTLEN
// Packetlength = 61
// Preamble count = (2)  4 bytes
// Append status = 1
// Address check = (0) No address check
// FIFO autoflush = 0
// Device address = 0
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = (41) RF_RDY
RF_SETTINGS rfSettings = {
    0x08,   // FSCTRL1   Frequency synthesizer control.
    0x00,   // FSCTRL0   Frequency synthesizer control.
    0x21,   // FREQ2     Frequency control word, high byte.
    0x62,   // FREQ1     Frequency control word, middle byte.
    0x76,   // FREQ0     Frequency control word, low byte.
    0xCA,   // MDMCFG4   Modem configuration.
    0x83,   // MDMCFG3   Modem configuration.
    0x93,   // MDMCFG2   Modem configuration.
    0x22,   // MDMCFG1   Modem configuration.
    0xF8,   // MDMCFG0   Modem configuration.
    0x00,   // CHANNR    Channel number.
    0x34,   // DEVIATN   Modem deviation setting (when FSK modulation is enabled).
    0x56,   // FREND1    Front end RX configuration.
    0x10,   // FREND0    Front end TX configuration.
    0x18,   // MCSM0     Main Radio Control State Machine configuration.
    0x16,   // FOCCFG    Frequency Offset Compensation Configuration.
    0x6C,   // BSCFG     Bit synchronization Configuration.
    0x43,   // AGCCTRL2  AGC control.
    0x40,   // AGCCTRL1  AGC control.
    0x91,   // AGCCTRL0  AGC control.
    0xE9,   // FSCAL3    Frequency synthesizer calibration.
    0x2A,   // FSCAL2    Frequency synthesizer calibration.
    0x00,   // FSCAL1    Frequency synthesizer calibration.
    0x1F,   // FSCAL0    Frequency synthesizer calibration.
    0x59,   // FSTEST    Frequency synthesizer calibration.
    0x81,   // TEST2     Various test settings.
    0x35,   // TEST1     Various test settings.
    0x09,   // TEST0     Various test settings.
    0x47,   // FIFOTHR   RXFIFO and TXFIFO thresholds.
    0x29,   // IOCFG2    GDO2 output pin configuration.
    0x06,   // IOCFG0    GDO0 output pin configuration. Refer to SmartRF® Studio User Manual for detailed pseudo register explanation.
    0x04,   // PKTCTRL1  Packet automation control.
    0x04,   // PKTCTRL0  Packet automation control.
    0x00,   // ADDR      Device address.
    PACKET_LEN // PKTLEN    Packet length.
};

   //RF initialization
   WriteSingleReg(FIFOTHR, 7); //FIFO RX:32 & TX:33 байт
   WriteSingleReg(PKTLEN , 100); //максимальная длина пакета 100
   WriteSingleReg(PKTCTRL1, 0x0F); //Address check and broadcast + crc_autoflush
   WriteSingleReg(PKTCTRL0, 0x44); //фикс. длина пак. + CRC вкл + чистые данные
   WriteSingleReg(ADDR, 0x01); //адрес 1
   WriteSingleReg(CHANNR, 0x02); //канал 2
   WriteSingleReg(FSCTRL1, 0x08); //IF frequency = 203kHz
   WriteSingleReg(FSCTRL0, 0x00); //не знаю что такое
   WriteSingleReg(FREQ2, 0x21); //не знаю что такое
   WriteSingleReg(FREQ1, 0x62); //не знаю что такое
   WriteSingleReg(FREQ0, 0x76); //не знаю что такое
   WriteSingleReg(MDMCFG4, 0x8C); //полоса 203кГц, степень двойки 12 (b1100)
   WriteSingleReg(MDMCFG3, 0x22); //dataRate = 115200 Baud
   WriteSingleReg(MDMCFG2, 0x1D); //манчестер + проверка преамбулы и sync
   WriteSingleReg(MDMCFG1, 0x22); //не знаю что такое
   WriteSingleReg(MDMCFG0, 0xF8); //не знаю что такое

/******************************************************************************
* CC430 RF Code Example - TX and RX (fixed packet length =< FIFO size)
*
* Simple RF Link to Toggle Receiver's LED by pressing Transmitter's Button   
* Warning: This RF code example is setup to operate at either 868 or 915 MHz,
* which might be out of allowable range of operation in certain countries.
* The frequency of operation is selectable as an active build configuration
* in the project menu.
*
* Please refer to the appropriate legal sources before performing tests with
* this code example.
*
* This code example can be loaded to 2 CC430 devices. Each device will transmit
* a small packet, less than the FIFO size, upon a button pressed. Each device will also toggle its LED
* upon receiving the packet.
*
* The RF packet engine settings specify fixed-length-mode with CRC check
* enabled. The RX packet also appends 2 status bytes regarding CRC check, RSSI
* and LQI info. For specific register settings please refer to the comments for
* each register in RfRegSettings.c, the CC430x513x User's Guide, and/or
* SmartRF Studio.
*
* G. Larmore
* Texas Instruments Inc.
* June 2012
* Built with IAR v5.40.1 and CCS v5.2
******************************************************************************/